Digital IC Design Backend Manager
Rapidly expanding IC design platform company specialized in IP, SOC and ASIC design services hiring talented and experienced Digital Backend IC Design Manager. You will part of well-trained engineers/designers who support customers in High-Performance Computing, AI, 5G & Network and Automotive industries using advanced technology.
Job Descriptions:
- Completing the digital backend work from netlist to GDS, at the TOP or block level, including PR (place and route), STA (static timing analysis), PV (physical verification), PA (power analysis), and other tasks.
- Collaborate with digital front-end engineers to debug issues such as timing, SDC, UPF, etc.
- Complete block level or TOP PD work with moderate difficulty or above
- Pre/post mask eco
Job Requirements:
- Microelectronics related major, bachelor's degree or above with more than 7 years of relevant working experience
- Familiarity with the complete design process from Netlist to GDS
- Proficient in using one or several sets of design tools related to Innovus/ICC2, PT/computers, lec/form, starrc/QRC, PTPX/volt, caliber, etc
- Experience in successfully tapping out chips with a process size below 14nm is preferred, and experience in working with low-power design chips is preferred
- Experience in TOP P&R work is preferred; （ top level partition, bump assignment, RDL routing, ESD plan, feedthrough inserting, pin assignment)
- Priority given to those with TOP STA experience
- Equipped with PCIE, DDR and other high-speed interface P&R experience is preferred
#LI-JACMY